©
dcstraney: Label
©
dcstraney: EPROM & RAM
©
dcstraney: EPROM & RAM
©
dcstraney: Middle
©
dcstraney: FIFO IC
©
dcstraney: LSI ASIC
©
dcstraney: FIFO IC
©
dcstraney: FIFO IC
©
dcstraney: Left edge
©
dcstraney: Middle
©
dcstraney: Right edge
©
dcstraney: Left edge
©
dcstraney: Overview, bottom
©
dcstraney: Overview, top